A novel LTPO AMOLED pixel circuit and driving scheme for variable refresh rate

This paper proposes a novel pixel circuit and driving scheme that adopts low-temperature polycrystalline silicon and oxide thin-film transistors (LTPO TFTs) for mobile devices using active-matrix organic light-emitting diode (AMOLED) displays. The proposed pixel circuit and driving scheme provide uniform luminance and render flicker invisible at variable refresh rates (VRRs) from 1 to 120 Hz. Using the proposed pixel circuit with extended compensation time (tCOMP) improves the luminance uniformity at a high-frame rate. The proposed driving scheme applies a voltage to the driving TFTs (D-TFTs) higher than the programmed data voltage during the skip frame. This reduces the flicker caused by the hysteresis of D-TFTs during low-frame rate driving. A 6.0-inch quad high-definition (QHD) LTPO-based AMOLED display was fabricated using the new pixel circuit and driving scheme. Experimental results of the proposed pixel circuit show that the standard deviation of luminance was reduced from 0.056 to 0.008 by extending tCOMP from 2 to 8 µs. The flicker level was −51 dB, so there was no visual artifact during 1 Hz driving. A flicker-free LTPO-based AMOLED display with low power consumption is possible; driving can proceed in 1–120 Hz range.


Introduction
In recent years, display backplane technology has been developed from hydrogenated amorphous silicon (a-Si:H) thin-film transistors (TFTs) to low-temperature polycrystalline silicon (LTPS) TFTs and then to lowtemperature polycrystalline silicon and oxide (LTPO) TFTs [1][2][3][4].Specifically, LTPO TFTs constitute the nextgeneration backplane technology for smartphones and smartwatches using active-matrix organic light-emitting diode (AMOLED) display because such devices must be driven at high-and low-frame rates (i.e.variable refresh rate [VRR]) in a power-efficient manner [17,27].A VRR driving is required for the following reasons: Fast-motion image scenarios, such as gaming and display scrolling, demand a high-frame rate of up to 120 Hz, whereas a low-frame rate down to 1 Hz is appropriate in low-power standby scenarios, such as the always-on display (AOD) and text mode.However, a VRR may exhibit poor compensation performance at high-frame rates and high flicker levels at low-frame rates [5].
Deterioration of compensation performance in highframe rates causes luminance non-uniformity.As the required frame rate increases, the scan time (t SCAN ) of one row is shortened; the compensation time (t COMP ) is now too short to reduce the threshold voltage (V TH ) variation, and compensation performance deteriorates.
The pixel circuits in one row can acquire voltages from only the data lines within the t SCAN .Therefore, a short t SCAN may cause the t COMP to be too short for the voltage programming method, resulting in the compensation error for luminance non-uniformity [2,6,15].If the stored voltage is not exactly equal to the real V TH of the driving TFT (D-TFT), the voltage-programmed pixel circuits are prone to imperfect compensation due to the limited t SCAN available.In other words, to ensure the image quality of a high-frame-rate display, t COMP should not be limited by t SCAN .However, in most pixel circuits of the voltage programming method, t COMP, and t SCAN are identical [7][8][9][10].To overcome this issue, some pixel circuits have been developed to extend t COMP [11][12][13][14][15][16], but these pixel circuits are based on LTPS TFTs and thus cannot be driven at low-frame rates.Therefore, it is necessary to extend t COMP without affecting the frame rate.Flicker is crucial in low-frame rate driving; the lower the frame rate, the longer the time to hold data on the storage capacitor.When the pixel circuits operate at low-frame rates, the V GS values of the D-TFTs change because of the leakage current of the switching TFTs [17].These V GS values directly influence the OLED current during emission, resulting in flicker.In other words, the leakage current of a switching TFT limits the applications of low-frame rate-driven displays.Many researchers have investigated overcoming this issue [5,[18][19][20].Unlike LTPS TFTs, indium-gallium-zinc-oxide (IGZO) TFTs enable low-frame rate driving due to their extremely low leakage current [17].Hence, several pixel circuits using LTPO TFTs have been developed for low-frame rate driving [5,[19][20][21][22][23][24][25][26][27][28][29][30].However, in the LTPO TFTsintegrated pixel circuit, the D-TFTs' hysteresis based on LTPS remains challenging [5].The perceived luminance change induced by D-TFT hysteresis is less visible at conventional frame rates (e.g. 60 Hz).However, driving a pixel circuit at a low-frame rate increases its sensitivity to the dynamic behavior of D-TFTs (i.e.hysteresis) [5].When a display is driven at a low-frame rate, the D-TFT current should stabilize as quickly as possible during image changes to minimize perceived luminance fluctuations (i.e.flicker).During low-frame rate driving, flicker is caused not only by the leakage current of the switching TFT but also by D-TFT hysteresis.This hysteresis is attributable to carrier trapping or detrapping, which affects V TH and causes transient luminance variations [21].The mechanism can be described as follows: First step (V TH sampling): The solid black line in Figure 1 represents the D-TFT I-V curve during the V TH sampling and programming period.The V TH [point (1)] is sampled at this time, and V GS [point (2)] is programmed based on the sampled V TH and data voltage (V DATA ).Therefore, emission begins with desired OLED current I DS_ (2) , providing the desired luminance.
Second step (emission period): Figure 1 shows that after V DATA programming, stress applied to the D-TFT changes the TFT I-V characteristics from I DS_(2) to I DS_(3) because of D-TFT hysteresis, changing the luminance.The transient luminance change caused by D-TFT hysteresis does not create a visible flicker at conventional frame rates (e.g. 60 Hz) because the perceived luminance fluctuation is well below the flicker fusion threshold [22].Under low-frame rate driving, however, it is critical to minimize the luminance fluctuation over time because the sensitivity of humans to flicker increases greatly from 10 to 15 Hz [23].As might be expected, the larger the hysteresis, the greater the luminance fluctuation and the more perceptible the flicker under low-frame rate driving.For this reason, low-frame rate driving requires that the leakage currents of the switching TFTs are low, and the hysteresis of the D-TFT is small.However, hysteresis is an intrinsic feature of an LTPS TFT [24].Therefore, for low-frame rate driving of an LTPO TFT-based AMOLED display, a new driving scheme that can compensate for D-TFT hysteresis is required.
In this paper, we propose a novel pixel circuit extending t COMP without affecting the frame rate.Extension of t COMP for each row guarantees accurate detection of V TH variations in D-TFTs.Also, the proposed driving scheme can compensate for the hysteresis of D-TFTs and supports low-frame rate flicker-free driving.Simulations were conducted, and a 6.0-inch quad high-definition (QHD) LTPO based AMOLED display was fabricated to verify the new pixel circuit and driving scheme.The manufactured AMOLED display exhibited excellent image quality during high-frame rate driving and no visible artifacts during low-frame rate driving.and skip frames, respectively.The OBV is always higher than V DATA .During the skip frame period, the S1 and S2 gate drivers output low voltage, and the clocks do not toggle; this reduces the power consumption of gate drivers.OBV is applied to the D-TFT to compensate for hysteresis during the skip frame period.Of the five switching TFTs, T1 and T2 are oxide TFTs, which is important because the gate voltage (V G ) of the D-TFT changes, and the flicker degrades the image quality if the leakage current of the switching TFT connected to the gate of the D-TFT is large.Figure 2 displays the proposed pixel circuit operation divided into six stages.

Operation of the proposed pixel circuit
Figure 3(a) shows the anode reset stage (t A/R ), where S3(n) and EM(n−1) are under low voltage and turn on T3 and T5.This stage aims to improve the low gray nonuniformity [26].V INT is equal to V SS or less than the OLED turn-on voltage to prevent current flow through the OLED when a black image is required.
In this stage, S2(n) remains low to turn off T2, so the proposed compensation scheme does not require any voltage from the data lines.Therefore, the t COMP of V TH is not limited by t SCAN , and the t COMP values of multiple rows can overlap, as shown in Figure 4.This increases the total t COMP available for sensing V TH_D−TFT and thus improves the precision of sensing.Hence, the pixel circuits maintain the D-TFT drain currents (I DS ) uniform because the V TH variations of the D-TFT are wellcompensated.The proposed pixel circuit generates a uniform driving current even during high-frame rate driving.So, this pixel circuit can improve the motion image quality of displays.In addition, T5 is turned off, and V INT is smaller than V SS ; thus, all currents generated by the D-TFT flow into the DV line rather than the OLED.The OLED remains completely dark.
Figure 3(d) shows the data programming stage (t PROG ) in which S2(n) is high to turn on T2, and V DATA is applied to N2. V DATA is stored in a capacitor (C1), and  the source voltage of the D-TFT is boosted as follows: where V S is the source voltage of the D-TFT, and V REF is the reference voltage.
Figure 3(e) exhibits the emission stage, where S1(n) and S2(n) go low to turn off T1 and T2.EM(n) and EM(n−1) go low to turn on T4 and T5; thus, and V DD is applied to N1.The V G of the D-TFT is boosted as follows: where V G is the gate voltage of the D-TFT.The OLEDs of all pixels in a row begin to emit.The OLED current (I OLED ) is: where k is the μ•C OX •W/L of the D-TFT.In Eq. ( 4), V TH_D−TFT and V DD are eliminated; D-TFT V TH variations and I-R drop since the resistance of the V DD metal line will not influence the uniformity of the display image.Therefore, the proposed pixel circuit generates a uniform driving current, and the t COMP of V TH is not limited by t SCAN .In the hysteresis compensation stage (t OBV ), OBV is applied during the skip frame period to compensate for D-TFT hysteresis and minimize flicker.Figure 3(f) points out that in this stage, S3(n) goes low to turn on T3; OBV is applied to N1 via N3.The OBV is higher than N2 and the programmed V DATA .OBV time (t OBV ) is 50 μs.Thus, the V GS of the D-TFT remains on status.The mechanism of the proposed driving scheme's hysteresis compensation can be described as follows: After V TH sampling and V DATA programming, bias stress is applied to the D-TFT to change the V TH , resulting in the luminance fluctuations, as shown in Figure 1.I DS shifts from point (2) on the thick solid black line to point (3) on the thin dotted red line, as shown in Figure 5(a) and is shown on the time axis of the solid black line in Figure 5(b).To compensate for D-TFT hysteresis, OBV is applied to the D-TFT during the skip frame.This shifts I DS _(3) to I DS _(4), while V TH_D−TFT shifts positively.The voltage applied to the D-TFT changes the TFT I-V curve from the thin dotted red line to the thick dotted blue line.After OBV application, a bias stress opposite to that during programming and V TH sampling is applied to the D-TFT; the TFT I-V curve then moves from point (4) to point (5) along the thick dotted blue line in Figure 5(a).This is explained by the time axis, as shown in the blue dotted line in Figure 5(b).Therefore, the current increase from point (2) to point (3) after programming and V TH sampling is offset by the current drop from point (5) to point (3) after applying the OBV, thereby reducing the current change.Thus, flicker is not perceived during low-frame rate driving.Applying the OBV during the skip frame reduces the deviation between the current-decrease area (A: blue slanted area) after applying the OBV and the current-increase area (B: black mesh).

Results and discussion
SmartSpice (Silvaco Inc.) simulations were conducted, and a 6.0-inch QHD LTPO-based AMOLED display was fabricated to confirm that the proposed pixel circuit provided uniform luminance at 120 Hz and QHD resolution.The frame rate ranges from 1 to 120 Hz VRR driving.Although most smartphones still use full high-definition (FHD) resolution, the newest premium smartphones provide QHD (or even higher) resolution.Mobile devices with frame rates of 120 Hz are not yet widely available, especially mobile LTPO-based AMOLED displays.
The researchers simulated the proposed pixel circuit with QHD and a maximum frame rate of 120 Hz for future mobile applications.Figure 6 shows the I-V characteristics of fabricated LTPS D-TFTs, with aspect ratios of 3.0 μm / 16.0 μm and oxide TFTs, with 3.0 μm / 3.5 μm aspect ratios, as used in the simulations.lists the parameters of the fabricated TFTs employed in simulations.Table 2 outlines the capacitance, scan signals, and voltage levels simulated.

Compensation performance during high-frame rate
Figure 7(a) shows the input signal waveform of the S1 gate driver as t COMP is varied from 2.0 μs to 8.0 μs.As the simulated D-TFT V GS is −3.18V, with longer t COMP , the D-TFT V GS becomes more similar to V TH .As t COMP becomes longer, V GS converges to the D-TFT V TH .From these simulation results, the longer t COMP allows more precise sensing of D-TFT V TH variations.Figure 8 shows the relative I OLED error rates versus the D-TFT V TH variations of −3.0 V ± 0.1 V ∼ ± 0.5 V at 5 gray (0.2 nits) corresponding with different t COMP .The relative I OLED error rate ranges from −28.6% to 26.4%, −16.2% to 15.6%, and −6.2% to 6.6% for t COMP of 2.0, 4.0, and 8.0 μs, respectively, confirming that the proposed pixel circuit with the longest t COMP of 8.0 μs indeed compensates more effectively for the D-TFT V TH variations.Also, the pixel circuit can freely extend t COMP owing to its overlapping compensation scheme.The luminance uniformity of the manufactured 6.0-inch LTPO-based AMOLED display was measured to evaluate the compensation performance of the pixel circuit with various t COMP values.Figure 9(a) to (c) present the optical images when t COMP was 2.0, 4.0, and 8.0 μs, respectively.As t COMP increases, the luminance uniformity improves.An ultra-high-resolution camera (RADIANT SOLUTION FPiS TM ) was used to quantify uniformity.The measured luminance was 0.2 nits at 5,000 points within the panel.As a result of measuring local luminance uniformity, the standard deviations of luminance became smaller as t COMP became longer (0.056, 0.024, and 0.008 for t COMP values of 2.0, 4.0, and 8.0 μs, respectively), as shown in Figure 9(d) to (f).These results confirm that the simulation results provide accuracy for the measurement results of luminance uniformity.Since the proposed pixel circuit can increase the t COMP, even if t PROG (or t SCAN ) is short as the frame rate increases, the compensation performance can secure the same level as the FHD panel because the t COMP of FHD is 8.0 μs.Therefore, the proposed pixel circuit ensures excellent luminance uniformity even at 120 Hz QHD high-frame rate driving.Also, as the pixel circuit can be driven at 120 Hz, the moving image quality of the AMOLED display can be improved [27][28][29].

Flicker characteristics of low-frame rate
Since the lower the frame rate, the longer the skip frame period compared to that of high-frame-rate driving, the time to hold the programmed data also becomes longer.
If the voltage-holding characteristic of the programmed data is poor during one frame, a flicker occurs.Therefore, the holding characteristics of V DATA are improved by applying oxide TFTs with very low leakage current to switching TFTs [15].Fig. S4(a) shows almost no luminance fluctuation at 120 Hz; flicker is not recognized.However, although the leakage current was reduced by using oxide TFT, luminance fluctuations were still present within one frame at a low gray level during 10 Hz driving.Consequently, flicker was perceived in panels  fabricated from LTPO TFTs due to luminance drop at 10 Hz driving, as indicated in Figure 13(a).This lumidrop during the emission period is due to the D-TFT hysteresis.Figure 1 explains the flicker mechanism, where the larger the D-TFT hysteresis, the greater the luminance change.Furthermore, flicker becomes more visible under low-frame rate driving [23].However, if the D-TFT hysteresis is small and settles rapidly, the magnitude and duration of luminance fluctuation are reduced, and flicker is less perceivable.Therefore, it is essential to minimize hysteresis to support low-frame rate driving.The proposed new driving scheme can compensate for D-TFT hysteresis.Figure 10(a) demonstrates the low-frame rate driving, divided into refresh and skip frames.Although no data are programmed during the skip frame, the OLED emits light.As highlighted in Figure 10(a), the proposed driving method supports flicker-free display low-frame rate driving; the OBV applied to the D-TFT during the skip frame compensates for hysteresis as follows.The D-TFT V TH positively shifts after OBV is applied during the skip frame.A negative shift of the D-TFT V TH during the refresh frame, and a skip frame with OBV, can be compensated for by the OBV. Figure 10(b) shows the D-TFT V TH behavior when OBV is applied during the skip frame period.Simulations were conducted to verify the proposed driving scheme.Figure 11(a) exhibits the simulation result that D-TFT V TH is negatively shifted because of hysteresis during the skip frame period when OBV is not applied when driving at 10 Hz. Figure 11(b) also shows the simulation result that D-TFT V TH is positively shifted during the skip frame period when OBV is applied during driving at 10 Hz.From the simulation results, if OBV is applied in the skip frame period, the negative shift of D-TFT V TH is reduced due to the relatively positive shift of D-TFT V TH .Figure 11(c) reflects the simulation result that I OLED changes when OBV is not applied during 10 Hz driving.As in Figure 11(a), D-TFT V TH fluctuation increases, as does the I OLED change.Figure 11(b) reveals that when OBV is applied, the fluctuation of D-TFT V TH is decreased, as is the I OLED change, as shown in Figure 11(d).Same as the 10 Hz simulations, the simulations were performed at 1 Hz depending on whether OBV was applied or not. Figure 12(a)-(b) explains that D-TFT V TH is negatively shifted during the skip frame period when OBV is not applied but not when OBV is applied when driving 1 Hz.From the simulation results, if OBV is applied during the skip frame period, the negative shift of D-TFT V TH is reduced by a relatively positive shift in D-TFT V TH .Figure 12(c) confirms I OLED changes when OBV is not applied during 1 Hz driving.Figure 12(a)'s results suggest that when OBV is not applied, the fluctuation of D-TFT V TH is increased, and the I OLED change also increases, as shown in Figure 12(c).Figure 12(b)'s results imply that when OBV is applied, the fluctuation of D-TFT V TH is decreased, and the I OLED change also decreases, as shown in Figure 12(d).Therefore, the OBV driving scheme is essential for the LTPO pixel circuit that can control the V TH behavior of D-TFT.A 6.0-inch QHD LTPO-based AMOLED display is fabricated to verify the proposed pixel circuit and new driving scheme, and luminance measurements were performed with the MINOLTA CA-410.Figure 13(a) and (b) show the measurement results of luminance fluctuation without and with OBV during 10 Hz driving, respectively.Figure 13(a) presents that if OBV was not applied, the luminance fluctuation was 3.0% between frames.Such luminance fluctuation causes visible artifacts, that is, flicker.However, when OBV was applied, the luminance fluctuation was 0.5%.Figure 13(c) and (d) show the measurement results without and with OBV during 1 Hz driving, respectively.Figure 13(c) represents that when OBV was not applied, the luminance fluctuation was 2.8% between frames.When OBV is applied, the luminance fluctuation was 1.0%.Therefore, no visible artifacts are perceived, and flicker is not recognized.Figure 12 conveys that the measurement results are consistent with those of the simulation.Based on these results, Figure 14 shows the results of flicker measurement when OBV is applied and not applied using the FLICKER MODE of MINOLTA CA-410.During 10 Hz driving, the flicker was −15 dB when no OBV was applied; this value is highly perceptible.However, when OBV was applied, both 1 Hz and 10 Hz driving showed the flicker was no higher than −50 dB, and no artifacts were perceived.These results proved that the causes of flicker of LTPO-based AMOLED pixel circuit in the low-frame rate driving are the leakage current of the switching TFTs and D-TFT hysteresis.Also, it is proved that the proposed compensation pixel circuit and driving scheme operate stably at high-and low-frame rates, so full VRR driving can be implemented.Figure 15 shows the measurement result of power consumption according to frame rate.The condition of power consumption measurement is 40% turn-on at 500 nits with a 6.0-inch QHD panel.The power consumption decreases as the frame rate decreases, and when driving at 1 Hz, the power consumption of the driver IC block (including analog and logic) is reduced by a quarter compared to that of the 120 Hz frame rate driving.The reason for the reduction in power consumption is that output signals of data and some gate drivers are not operated during the skip frame period when driving at a low-frame rate, as indicated in Figure 10(a).However, the power consumption of the panel does not decrease because the frame rate does not affect the D-TFT current.Based on the measurement results, the LTPO-based AMOLED display provides excellent moving image quality and low power consumption through the VRR driving depending on the operation environment(e.g.game, AOD, still image, and text mode).

Comparison to previous works
Table 3 compares the new pixel circuit with previous ones.The circuits in [2,6,30,31] have t COMP values larger than the t SCAN values.However, the pixel circuits in [2,6], and [32] cannot compensate for VDD IR drop, so they cause upper and lower luminance deviation in the display panel.The pixel circuit of [30] lacks high-resolution capability because it requires two data lines.Also, none of these circuits compensates for hysteresis.They cannot operate at low-frame rates as they are composed  only of LTPS TFTs.Pixel circuits based on LTPO [32,33] do not compensate for hysteresis and cannot extend the t COMP .Therefore, even with LTPO pixel circuits, a flicker occurs during low-frame-rate driving, and compensation performance deteriorates due to the reduced t COMP during high-frame-rate driving.The proposed pixel circuit and driving scheme can achieve VRR driving from 1 to 120 Hz.

Conclusion
This paper presents a novel pixel circuit and driving scheme based on an LTPO TFT backplane.This extends the t COMP .The pixel circuit overlaps the t COMP of multiple rows, which increases the V TH sensing time and allows precise extraction of D-TFT V TH variations.A novel pixel driving scheme that compensates for the hysteresis by applying OBV to the D-TFT was proposed and experimented to ensure flicker-free display during low-frame rate driving.A 6.0-inch QHD LTPO-based AMOLED panel is fabricated, and the fabricated panel exhibits excellent luminance uniformity.Measurement results of luminance uniformity of the proposed pixel circuit show that the standard deviation of luminance was reduced from 0.056 to 0.008 by extending the t COMP from 2 to 8 μs.The proposed pixel circuit exhibits excellent compensation performance of D-TFT V TH variations even during high-frame-rate driving with a short t SCAN .Also, applying OBV to the D-TFT greatly reduces flicker at 1 and 10 Hz.The flicker level was -51 dB, without any visual artifacts, during 1 Hz driving.Compared to 120 Hz, the power consumption of the driver IC is reduced by a quarter at 1 Hz.Therefore, the proposed pixel circuit and driving scheme based on the LTPO TFT backplane can operate without visual artifact in VRR driving from 1 to 120 Hz and can be used in the LTPO-based AMOLED display for mobile devices.

Figure 1 .
Figure 1.Schematic I-V characteristic of p-type TFT: The solid black line is the I-V curve when changing from V TH sampling to data programming period, and the dotted blue line is the I-V curve during the emission period.

Figure 2 (
Figure 2(a) illustrates the proposed pixel circuit composed of one D-TFT, five switching TFTs, and two capacitors.Figure 2(b) and (c) present the timing diagrams of the control signals for the refresh and skip frames, respectively.The refresh and skip frames constitute one frame during low-frame rate driving [25].Data are sequentially noted during the refresh frame period; no data are written during the skip frame period.DV(n), a dynamic voltage, provides the initialization voltage (V INT ) and on-bias voltage (OBV) for hysteresis compensation to the refresh

Figure 2 .
Figure 2. (a) Proposed pixel circuit and its timing diagrams of control signals in (b) refresh frame and (c) skip frame.

Figure 3 (
b) demonstrates the initialization stage (t INT ), where S1(n) is under high voltage to turn on T1, and EM(n) is under low voltage to turn on T4.The S2(n) voltage is low to turn off T2, and the S3(n) and EM(n−1) voltages are high to turn off T3 and T5.This stage initializes the voltages of the gate and source nodes of the D-TFT.The gate node (N2) and source node (N1) of D-TFT are initialized to V REF and V DD , respectively.As T5 is turned off during the initialization stage, the OLED is completely off and achieves the real black luminance.

Figure 3 (
c) details the compensation stage (t COMP ), where the EM(n) goes high to turn off T4.The S1(n) voltage remains high to apply V REF to N2. S3(n) goes low to turn on T3.V GS_D−TFT is larger than |V TH_D−TFT |; the D-TFT begins to generate a current.Meanwhile, N1 discharges through T3 until the D-TFT is cut off.Finally, N1 discharges to V REF + |V TH_D−TFT |, as follows:

Figure 4 .
Figure 4.The extended t COMP using overlapping scheme when (a) t COMP is 2H and (b) t COMP is 4H.

Figure 5 .
Figure 5. Schematic of the dynamic behavior of the D-TFT due to the hysteresis characteristics: (a) I-V curve (dotted red line) during emission and (dotted blue line) during OBV and (b) schematic of I DS change before and after OBV.

Figure 6 .
Figure 6.I-V characteristics of fabricated LTPS D-TFT and oxide switching TFT.

Figure 7 .
Figure 7. Simulated transient waveforms of the gate (N2) and source node (N1) of D-TFT according to t COMP ; (a) Input waveforms of S1 according to t COMP , and V GS of D-TFT waveforms when t COMP is (b) 2.0, (c) 4.0, and (d) 8.0 µs.

Figure 7 (
Figure7(a) shows the input signal waveform of the S1 gate driver as t COMP is varied from 2.0 μs to 8.0 μs.Figure7(b) to (d) show the simulation results when D-TFT V G (N2) and V S (N1) change at t COMP value of 2.0 μs, 4.0 μs, and 8.0 μs, respectively.At this time, t PROG is fixed at 2.0 μs.In a conventional driving scheme, t PROG and t COMP are identical; the t COMP values of FHD and ultra-high-definition (UHD) at 120 Hz frame rate are 8.0 μs and 2.0 μs, respectively.When t COMP is 2.0 μs and 4.0 μs, the V GS values of the D-TFT are −4.10V and −3.69 V after D-TFT V TH sensing, as shown in Figure7(b) to (c), respectively.When t COMP is 8.0 μs, the D-TFT V GS is −3.28 V, as shown in Figure7(d).As the simulated D-TFT V GS is −3.18V, with longer t COMP , the D-TFT V GS becomes more similar to V TH .As t COMP becomes longer, V GS converges to the D-TFT V TH .From these simulation results, the longer t COMP allows more precise sensing of D-TFT V TH variations.Figure8shows the relative I OLED error rates versus the D-TFT V TH variations of −3.0 V ± 0.1 V ∼ ± 0.5 V at 5 gray (0.2 nits) corresponding with different t COMP .The relative I OLED error rate ranges from −28.6% to 26.4%, −16.2% to 15.6%, and −6.2% to 6.6% for t COMP of 2.0, 4.0, and 8.0 μs, respectively, confirming that the proposed pixel circuit with the longest t COMP of 8.0 μs indeed compensates more effectively for the D-TFT V TH variations.Also, the pixel circuit can freely extend t COMP owing to its overlapping compensation scheme.The luminance uniformity of the manufactured 6.0-inch LTPO-based AMOLED display was measured to evaluate the compensation performance of the pixel circuit with various t COMP values.Figure9(a) to (c) present the optical images when t COMP was 2.0, 4.0, and 8.0 μs, respectively.As t COMP increases, the luminance uniformity improves.An ultra-high-resolution camera (RADIANT SOLUTION

Figure 10 .
Figure 10.The conceptual schematic of (a) timing diagram of the OBV driving at low-frame rate and the (b) V TH behavior of D-TFT when OBV is applied.

Figure 11 .
Figure 11.Simulation results of D-TFT V TH behavior and I OLED fluctuation according to the OBV at 10 Hz: (a) D-TFT V TH behavior without OBV, (b) D-TFT V TH behavior with OBV, (c) I OLED variation without OBV during skip frame, and (d) I OLED with OBV during skip frame.

Figure 12 .
Figure 12.Simulation results of D-TFT V TH behavior and I OLED fluctuation according to the OBV at 1 Hz (a) D-TFT V TH behavior without OBV, (b) D-TFT V TH behavior with OBV, (c) I OLED variation without OBV during skip frame, and (d) I OLED variation with OBV during skip frame.

Figure 13 .
Figure 13.Measurement results of luminance fluctuation (a) without OBV at 10 Hz, (b) with OBV at 10 Hz, (c) without OBV at 1 Hz, and (d) with OBV at 1 Hz.

Figure 15 .
Figure 15.Measurement results of power consumption according to the frame rate.

Table 1 .
Parameters of the fabricated LTPS and oxide TFT.

Table 2 .
Simulation conditions

Table 3 .
Comparison of the proposed pixel circuit and other works.
Figure 14.Flicker measurement results without and with OBV according to the frame rate.