Simulation of an integrated spiral inductor and inter-digital capacitor in a buck micro converter

In this paper, a novel radiofrequency circuit is designed and developed for an integrated on-chip spiral inductor and inter-digital capacitor of the substrate. Results of extensive simulations concerning the influence of both spiral inductor and inter-digital capacitor geometrical parameters on quality factor value are presented. Two scenarios are considered in the simulation; the first operation of buck converter including an ideal capacitor and inductor and then its operation including an inter-digital capacitor and integrated spiral inductor. For both scenarios, we observed that their respective output voltages as well as their respective output currents present the same time responses.


Introduction
Because of the increased demand for undersize portable and multifunctional electronic devices, it is natural to say that these requirements are key incentives for researchers in the improvement of miniaturized DC-DC converters in recent years [1][2][3]. Hence, the research trend objective is to develop small size converters, which operate with high efficiency when shifting voltage levels in electronic devices. These converters can be used in a wide range of small size and/or portable electronic devices. These include, not limited to, smartphones, tablet PCs, micro-electromechanical system (MEMS) sensors, data storage devices and cameras. Thus, if the converter is miniaturized the overall size of the aforementioned devices will further reduce [4]. It is worth emphasizing that it has been reported that the main factors influencing the overall size, cost and performance of portable devices are the passive components. Owing to that, the research focus is recently on the task of passive functions as a drive to further miniaturize and integrate portable electronic devices [5,6].
It is desirable to integrate passive devices within the silicon substrate to reduce parasite due to interconnection, reduce the units' size and cost, and increase radio frequency circuits' operating frequencies. Furthermore, it has been reported that radiofrequency circuits are heavily dependent on inductors and capacitors components [7].
The aim of our work is the modelling of an on-chip spiral inductor and inter-digital capacitor that will be integrated in a DC-DC buck converter, for low powers and high frequencies.
The conception of the inductor and capacitor follows several phases. First, the calculation of different geometric and electric parameters, the planar integrated two components (inductor and capacitor) are completely different from the classical geometric form. Then, the study of the different geometrical parameters effects of spiral inductor and inter-digital capacitor is carried out by the MATLAB simulation software.
Finally, the simulation of the integrated two components (inductor and capacitor) in buck converter to validate the studies, we used the PSIM software.
The second objective is to reduce the component size at a low manufacturing cost.

Design and modelling of the spiral inductor
Inductors can be designed in various geometric parameters as shown in Figure 1: (d in ) as the inner diameter, (d out ) is outer diameter, (S) expresses the spacing between turns, (W) is the conductor width and (N) is the turn's number.
The accepted expression for the low-frequency inductance of planar spiral inductors is the modified Wheeler formula [8]: where (d avg ) is the average diameter, (A) is the fill factor, and (K 1 ) = 2.34 and (K 2 ) = 2.75 are the inductor Figure 1. Square spiral inductor [8].  square-shaped coefficients.
The values of square spiral inductor design parameters are indicated in Table 1. The equivalent electrical model of the integrated spiral inductor is depicted in Figure 2.
The series resistance (R S ) is computed conventionally as [10]: where the skin depth, δ, is expressed as [11]: The series capacitance (C S ) is calculated as the capacitance of the cross-overlapping between the underpass and the spiral. It can be expressed as [12]: where (ε o ) is the free space dielectric constant and (t ox ) is the oxide thickness. The total oxide capacitance (C ox ) between the spiral and silicon can be calculated by using an expression from [13]: The substrate capacitance (C sub ) is given by the following expression: The substrate resistance (R sub ) can be estimated as: where (ρ sub ) is the resistivity of the substrate and (t sub ) is the thickness of the substrate. The integrated spiral inductor efficiency is computed as follows [14]: stocked energies s dissipated energies (10) The mathematical equations used to calculate the electrical parameters of an integrated spiral inductor are presented in detail as follows (1)- (9). The essential electrical parameters are collated in Table 2. Figure 3 shows the geometrical structure of an interdigital capacitor. As shown in Figure 3, the geometry design parameters are fingers number (n = 6), finger length (l = 310 μm), finger width (w = 45 μm), finger gap (s = 30 μm) and end gap (s e = 15 μm). The equivalent circuit model of the integrated interdigital capacitor is shown in Figure 4. In this model, the series capacitance (C) accounts for the capacitance between the fingers, whereas the series resistance (R) resulting from a finite conductivity of metallic components of the element. The capacitors (C 1 ) and (C 2 ) connected to the ground are the parasitic capacitances.

Design and modelling inter-digital capacitor
The following expressions characterizing the element equivalent circuit model [16]: where (ε eff ) is the effective dielectric constant.  The ratio of the complete elliptic integral of first kind K(k) to its complement K (k) is expressed as [17]: The series resistance (R) represents metallization losses and it can be calculated by the following formula [18]: Hence, making use of the above equations, the quality factor due to dielectric loss tangent is computed as follows [19]: The calculated electrical parameters of the equivalent electrical circuit of the integrated inter-digital capacitor are shown in Table 3.

Integrated inductor and capacitor using CMOS techniques
Recently, some research groups have been working on chip implementation using integrated processes such as CMOS techniques [19]. The CMOS technique is attractive for use in passive microwave circuits for various reasons, such as reduced parasitic effects, smaller chip area, lower power consumption, lower system complexity and lower integration cost.
In this paper, we demonstrate the integration of on-chip inductors and inter-digital capacitor of micro converter fabricated in a CMOS technology.
The micro converter is implemented using an interdigital capacitor integrated into the middle of spiral inductors. In order to achieve a compact size, the capacitor is embedded inside the inductor. Also, the coil of the inductor is intertwined to enhance mutual inductance. Figure 5 shows the layout of the presented design.
The design and fabrication using a silicon substrate at 200 μm in depth following the standard CMOS fabrication process. The chip size is 900 μm × 700 μm.

Results and discussions
In this section, we discuss the MATLAB-based simulation results obtained from the spiral inductor and inter-digital capacitor for different geometrical parameters.   Figure 6 shows three plots of quality factor versus frequency for three different inner diameters (80, 100 and 120 μm) with a spiral inductor area that is kept unchanged. As shown in Figure 6, an increase of the inner diameter from 80 μm to 120 μm results in a decrease of quality factor. This is due to the decreasing separation between the turns. Figure 7 shows the variation of quality factors versus frequency for different spiral inductor turns number (N = 2, 3 and 4) and illustrates the influences of diverse the number of turns on the quality factor. As shown in Figure 7, an increase turns number from 2 to 4 results in a decrease of the quality factor and this decrease is more Figure 7. Influence of turns number on the quality factor. significant at frequencies above 3 MHz. The value of the quality factor decreases because of the added conductor losses. Figure 8 shows the effects of the conductor width on the quality factor of the spiral inductor. Increasing the width from 20 μm to 40 μm means an increase in the conductor cross-section, which results in a decrease of the series resistance. This is demonstrated in Figure 8, an increase in the conductor width provides higher quality factors. Figure 9 shows the influences of the different thicknesses of conductor on the quality factor of the spiral inductor. A thicker conductor from 15 μm to 25 μm will increase the quality factor. Figure 10 shows, the variation of quality factor as a function of frequency for a different number of fingers. As shown in Figure 10, the quality factor value is inversely proportional to the finger number. For example, as fingers number decreases from 7 to 5, the quality factor increases from 238 to 259.

Influence of the finger length on the quality factor versus frequency
The effect of finger length on the quality factor of the inter-digital capacitor is shown in Figure 11. The quality factor decreases when the finger length increases from     300 μm to 400 μm. The (Q max ) decreases from 256 to 288. Figure 12 shows the effects of different finger width on the quality factor as a function of frequency. As shown in Figure 12, an increase in finger width from 30 μm to 50 μm reduces the series resistor that eventually leads to a higher quality factor at frequencies higher than 3.5 MHz.

Buck converter application
In this study, we have selected a buck converter shown in Figure 13 is a step-down DC-DC converter consisting primarily of inductor, capacitor and two switches (generally a transistor switch and diode) for controlling inductor and capacitor.
The freewheeling diode (D) conducts due to energy stored in the inductor; and the inductor current continues to flow through inductor (L), capacitor (C), load and diode (D). The inductor current falls until transistor (S) is switched on again in the next cycle.
The waveforms for voltage and current are shown in for continuous load current assuming that the current rises or falls linearly as depicted in Figure 14.   The design specifications of buck micro converter are indicated in Table 4: From the data of the converter, we deduce the value of the necessary inductance.
The duty cycle is given by: We deduce the value of the filtering capacity C according to relation: The simulation was executed using PSIM software 6.0. The simulation is performed to test the operation of our buck micro converter for two scenarios: operation of buck converter including an ideal capacitor and inductor and then operation including an inter-digital capacitor and integrated spiral inductor Figure 15 depicts the circuit of buck converter containing an ideal inductor and capacitor. Figure 16 shows the time responses of the output voltage, V out , and current, I out , of the buck converter.

Converter including an integrated spiral inductor and inter-digital capacitor
Converter with the integrated spiral inductor and interdigital capacitor. Figure 17 illustrates the circuit of a buck converter with the ideal inductor and capacitor retrofitted with an integrated spiral inductor and inter-digital capacitor. The different electrical parameters of the equivalent electrical circuit are indicated in above Tables 2 and 3. Figure 18 shows the time responses of the output voltage, V out , and current, I out , of the upgraded buck converter. Figures 16 and 18 show similar time responses of output voltage and current for both set-ups.     Figure 19 shows the ripples of the output current which varies between 0.34209 and 0.35019 A. Figure 20 shows the output voltage is continuous with a low ripple varying between 0.85524 and 0.87548 V.   The measured values of output and input of voltages and currents of the buck converter are given in the following Tables 5 and 6: The simulation results are compared with several prior work, as listed in Table 7.
The switching frequency is the lowest due to the integration of the two components together, the spiral inductor and the inter-digital capacitor.
Our design occupies a smaller area than all the previously reported designs, with a comparable output voltage and load current.
These results demonstrate the applicability and advantages of integrating the spiral inductors and interdigital capacitor for DC-DC switching buck converters.

Conclusion
The important issues to be considered for the design of on-chip inductor and inter-digital capacitor, which are integrated in a DC-DC buck converter, have been highlighted in this work.
To extract the technological parameters, we conceive a new electrical model of a spiral inductor and interdigital capacitor integrated with substrate.
We also present the geometrical parameters and their influence on the value of the inductor and capacitor. This allowed us to simulate the factor quality of our two components (inductor, capacitor) and analysed the influence of different geometrical on this coefficient.
Then, the influence of various geometrical parameters was analysed in detail based on simulations using the software MATLAB.
Moreover, it was also observed that the highest maximum quality factor of spiral inductor and inter-digital capacitor are obtained with the low inner diameter (d in ), the number of turns (N), the number of fingers (n) and the finger length (l).
Using the software PSIM6.0, we validate the results of the integrating of the inductor and capacitor.
We compare the waveforms of currents and voltages of a buck converter in two different electrical circuits. The first circuit is a buck converter containing an ideal inductor and capacitor, without any parasitic effects; the second is equivalent circuits for a buck converter with the integration of the two components together, spiral inductor and inter-digital capacitor.
After this comparison, we conclude that the results are very encouraging, because the waveforms of currents and tensions are respected, which enables us to say that the new electrical circuit of the integrated spiral inductor and capacitor that we propose functions perfectly.